Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution

Properties

id: d3f:CWE-1421

name
Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution
definition
A processor event may allow transient operations to access architecturally restricted data (for example, in another address space) in a shared microarchitectural structure (for example, a CPU cache), potentially exposing the data over a covert channel.
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Neighbors

CWE-1421 has no direct neighbors in this release.

Inferred Relationships

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